SOC Digital Design Lead (Digital - AMS)

IC Resources
Bristol
1 month ago
Applications closed

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Senior Director, Post Silicon and Emulation

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Graduate Teaching Assistant (GTA) - Federated Learning-based Intrusion Detection System for Intelligent Transportation Systems with Mixed Urban-Road Users

Brand new, and cutting edge AI project, working for an exciting US start-up in the semiconductor space - to be based full-time from the UK.


Salary is negotiable - (based on seniority and relevance of experience) - circa £110-140k (or higher)


I am looking for a SOC/chip design lead to be responsible for the end to end design, set-up, micro-architecture defintion, defintion of the whole prcess & desgin flow and RTL design of a new AI project, based on neural networks technology.


You will be the lead designer, with duties inclduing team leadership / management of a small team in charge of delivering the full chip to delivery at the fab.


Must have experience:

  • Degree / Masters / PhD in electronics / micro-electronics, physics or similar field
  • 10-20 years' experience of full chip design and delivery
  • Tech lead / team leadership / team management
  • Digital / AMS, analog-mixed-signal IP
  • End to end chip / SOC delivery experience
  • ASIC & FPGA - verilog, system verilog, VHDL
  • ADC / DAC - digital - analog interfaces
  • Functional verification - system verilog - IP, system, sub-system, block, top level experience
  • Creation of test-benches
  • detailed knowledge of complex tape-out processes, and interactions with fabrication plants
  • Full digital design flow, from RTL2GDS
  • SOC design, integration, system design, system architecure
  • power management / PMIC / ultra-low power / optimisation & performance
  • synthesis / HLS / STA
  • physical implementation / physical design


Bonus / nice to have skills

  • CPU / GPU / RISC-V design and architecture
  • TPU / VPU / FPU - tensor, vector or floating point processor units
  • HW, hardware accelerators
  • PLLs / filter design
  • RF-SOC
  • DSP, signal processing
  • Flash memory - DDR / HBM / high-bandwith memory / cache chorency
  • clock, timing constraints


This position is ONLY available to senior level digital design engineers with full UK working rights

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